1. Field of the Invention
The present invention is related to a semiconductor device and a method of manufacturing the semiconductor device.
2. Description of the Related Art
A memory cell constituting a DRAM (Dynamic Random Access Memory) generally includes a memory cell transistor and a capacitor. With an object to increase an integration level of the memory cell, a COB (Capacitor Over Bit line) type DRAM in which a capacitor of the DRAM is located in an upper layer of a bit line has been proposed. FIG. 10 shows a constitution of such COB type DRAM.
In this DRAM a MOS transistor formed on a semiconductor substrate, in FIG. 10 a silicon substrate 10, is serving as a memory cell transistor. In an upper layer of the memory cell transistor, a bit line 6 is formed via a cell contact interlayer film 8, and in an upper layer of the bit line 6, a capacitor 11 is formed via a capacitor contact interlayer film 7. The capacitor 11 is formed for example in a cylindrical shape through a film 12 located on the capacitor contact interlayer film 7 and a contact interlayer film 13. The bit line 6 is connected to a cell contact 9 via a barrier metal layer 5, thereby achieving a connection to the memory cell transistor formed on the silicon substrate 10, and the capacitor 11 is connected to the memory cell transistor formed on the silicon substrate 10 via the capacitor contact 4 and the cell contact 9.
FIG. 11 shows a detailed structure around the capacitor 11 of FIG. 10. As shown in FIG. 11, the capacitor 11 includes a lower electrode 14, a capacitance layer 15 and an upper electrode 16. And a contact 17, connecting a metal interconnect 18 formed on the contact interlayer film 13 to a capacitor contact 4 or the upper electrode 16, is provided on the contact interlayer film 13.
A DRAM constituted as above facilitates increasing an integration level, since the capacitor 11 is provided in an upper layer of the memory cell transistor.
In turn, along with the achievement of a higher integration level of semiconductor devices through these years, further micronization of a contact size has been required. As a matter of fact, a contact, which used to be approx. 0.2 μm in diameter, is currently as fine as 0.12 μm in diameter. For such reason, recently an ArF (Argon Fluoride) stepper has come to be more widely used for pattern transfer, in place of a KrF (Krypton Fluoride) stepper. Since uses a light of a shorter wavelength than that of a KrF stepper, an ArF stepper can perform a finer exposure. For example, an ArF stepper uses an excimer laser of 193 nm in wavelength, while a KrF stepper uses an excimer laser of 248 nm in wavelength.
On the other hand, a photo resist used for an ArF exposure has a less chemical resistance than a one used in a KrF exposure. Therefore, it is difficult to form a deep contact hole when using an ArF stepper.
Accordingly, in case of using an ArF stepper to manufacture a semiconductor device of such a structure as shown in FIG. 11, the contact 17 can only be formed in a lower height, and the capacitor 11 also becomes lower. When the capacitor 11 is lower, a surface area of the lower electrode 14 and the upper electrode 16 is reduced, which results in a decrease of a capacitance value of the capacitor 11.
Further, a decrease in a capacitance value of a memory cell makes it difficult for the device to perform stably, thereby degrading reliability of the device. Therefore, maintaining the capacitance value of a memory cell at a certain level, despite the increase in integration level, constitutes a key issue.
To achieve such a goal, for example JP-A Laid Open No. 2001-15705 discloses a semiconductor device provided with a capacitor contact formed inside an opening in which a capacitor is to be formed, so as to increase a surface area of a lower electrode, to thereby increase a capacitance value.
In case of such a semiconductor device, since a capacitor contact is formed inside an opening for increasing a surface area of a lower electrode, a position where the capacitor may be located depends on a position of the capacitor contact. Besides, in order to prevent a short circuit between a bit line and the capacitor contact, the capacitor contact has to be formed in the middle between bit lines. Therefore, a position where the capacitor contact may be disposed is limited. Consequently, according to a conventional technique as cited above, a position to form a capacitor is limited, which requires a significant compromise in designing freedom of the semiconductor device.